1. Field of the Invention
The invention relates to a semiconductor device and a method of manufacturing the same, particularly, a semiconductor device of a high breakdown voltage transistor and a method of manufacturing the same.
2. Description of the Related Art
A high breakdown voltage MOS transistor using a LOCOS (Local Oxidation of Silicon) offset method is conventionally known. Hereafter, a method of manufacturing this high breakdown voltage MOS transistor will be described referring to FIGS. 9A to 9E.
As shown in FIG. 9A, a pad oxide film 22 is formed on a front surface of an N type silicon substrate 21 or a silicon substrate 21 formed with an N well by thermal oxidation, and a silicon nitride film 23 is formed on the pad oxide film 22 by a low pressure CVD method or the like.
Then, as shown in FIG. 9B, the silicon nitride film 23 in portions for forming element isolation regions and for forming P type drift layers serving as offset drain regions is etched and removed by a predetermined photolithography process or the like. Then, portions except the portions for forming the offset drain regions are covered by a photoresist film (not shown), and P-type impurities are ion-implanted using the photoresist film and the silicon nitride film 23 as a mask to form P type layers 24a of which the concentrations are relatively low and which are to be the offset drain regions.
Then, as shown in FIG. 9C, thermal oxidation and thermal diffusion are performed using the silicon nitride film 23 as a mask to form element isolation oxide films 25 having a thickness of about 500 nm on the front surface of the silicon substrate 21 and form P type drift layers 24b which are to be the offset drain regions. The silicon nitride film 23 and so on are then removed by etching.
Then, as shown in FIG. 9D, N type impurities 26 are ion-implanted in the silicon substrate 21 using the oxide films 25 as a mask in order to adjust the threshold voltage, and then a gate oxide film 27 is formed on the front surface of the silicon substrate 21. A polysilicon film is then deposited by a CVD method, and a gate electrode 28 made of the polysilicon film is formed by a predetermined photolithography process or the like.
Then, as shown in FIG. 9E, impurities are ion-implanted using the gate electrode 28 and the oxide films 25 as a mask to form a high concentration P type source layer 29 and a high concentration P type drain layer 30. In this manner, a high breakdown voltage MOS transistor 32 having a channel region 31 between the P type drift layer 24b and the P type source layer 29 is completed.
In the conventional high breakdown voltage MOS transistor 32, in order to enhance the reliability by increasing the drain breakdown voltage by relieving the electric field intensity at the side end portion of the P type drift layer 24b abutting the channel region 31, the impurity concentration of the P type drift layer 24b serving as the offset drain region need be decreased so that the depletion layer expands.
On the other hand, the current drive ability of the high breakdown voltage MOS transistor need be enhanced, and the impurity concentration of the P type drift layer 24b serving as the offset drain region need be increased to decrease the resistance of the current path. It means that the high breakdown voltage characteristics and the high current drive ability are in a tradeoff relation, and thus it is difficult to use the best of both the characteristics and ability respectively in the conventional high breakdown voltage MOS transistor 32.
Therefore, the invention is directed to providing a high breakdown voltage transistor having a high drain breakdown voltage and high current drive ability for the market desiring a high performance high breakdown voltage transistor.